One prior processor transfers information utilizing a non-burst mode. More specifically, the prior processor transfers information that is longer than the capacity of the bus by using multiple individual write cycles. Existing computer systems designed for a processor with no write-burst capability contains components like a chipset which will only operate properly with non-burst processors. Write-burst capability is the ability to transfer information that is longer than the capacity of the bus by using a single elongated write cycle. When a processor with write-burst capability is inserted into such a system, the chipset will not accept a write-burst transfer and can cause the entire system to malfunction. However, the system can be modified to accept a write-burst capable processor by replacing some components of the chipset and other incompatible components. Write-burst capable processors are desirable because of the greater performance of the processor in accomplishing data transfer.
Sometimes it is desirable to replace a processor in an existing system with a new processor to utilize new features and advancements in processor technology. But not all prior systems can be modification, to accept write-burst capable processors; without the modification, the prior processor can only be replaced with a non-burst processor. Thus, two different processors are required, one for non-burst systems and one for write-burst systems. However, maintaining a product line with two different processors both performing essentially the same function has significant associated costs.
Thus, what is needed is a processor that selects between a write-burst mode and a non-burst mode of transferring information. In this manner, the processor can transfer information in a write-burst mode for use in systems that accept write-bursting and can also transfer information in a non-burst mode for use in systems that accept non-burst cycles only.